HUAWEI-CESC-MA5100-MIB
AI MIB Summary
Standard SNMP MIB module defining data structures for HUAWEI-CESC-MA5100-MIB.
73
Objects
Active
Status
3
Dependencies
Imported Objects
Objects
73 total| Object Name |
|---|
hwMusaCescMib OBJECT IDENTIFIER .1.3.6.1.4.1.2011.2.6.5.8 |
IMPORTS Unknown .1.3.6.1.4.1.2011.2.6.5.8 |
hwMusaCescCfgTableBoard config table SEQUENCE OF HwMusaCescCfgEntry .1.3.6.1.4.1.2011.2.6.5.8.1 |
hwMusaCescCfgEntryBoard config table entry HwMusaCescCfgEntry .1.3.6.1.4.1.2011.2.6.5.8.1.1 |
hwMusaCescWorkModeWorking mode of CES boardrw Enumeration .1.3.6.1.4.1.2011.2.6.5.8.1.1.3 |
hwMusaCesc16MTDMBus0TDM bus 0 of CES boardrw INTEGER .1.3.6.1.4.1.2011.2.6.5.8.1.1.4 |
hwMusaCesc16MTDMBus1TDM bus 1 of CES boardrw INTEGER .1.3.6.1.4.1.2011.2.6.5.8.1.1.5 |
hwMusaCesc16MTDMBus2TDM bus 2 of CES boardrw INTEGER .1.3.6.1.4.1.2011.2.6.5.8.1.1.6 |
hwMusaCesc16MTDMBus3TDM bus 3 of CES boardrw INTEGER .1.3.6.1.4.1.2011.2.6.5.8.1.1.7 |
hwMusaCescPortCfgTableE1 port config table SEQUENCE OF HwMusaCescPortCfgEntry .1.3.6.1.4.1.2011.2.6.5.8.2 |
hwMusaCescPortCfgEntryE1 port config table entry HwMusaCescPortCfgEntry .1.3.6.1.4.1.2011.2.6.5.8.2.1 |
hwMusaCescPortIndexCES port index INTEGER .1.3.6.1.4.1.2011.2.6.5.8.2.1.3 |
hwMusaCescPortWorkModeThe working mode of E1 portrw Enumeration .1.3.6.1.4.1.2011.2.6.5.8.2.1.4 |
hwMusaCescPortClockModeClock mode of E1 portrw Enumeration .1.3.6.1.4.1.2011.2.6.5.8.2.1.5 |
hwMusaCescPortSignalTypeSignal type of E1 portrw Enumeration .1.3.6.1.4.1.2011.2.6.5.8.2.1.6 |
hwMusaCescPortFrameVerifyModeFrame verify mode of E1 portrw Enumeration .1.3.6.1.4.1.2011.2.6.5.8.2.1.7 |
hwMusaCescPortTimeSlotBMPTimeslot bitmap of E1 portro INTEGER .1.3.6.1.4.1.2011.2.6.5.8.2.1.8 |
hwMusaCescPortWarningStatusAlarm state of E1 port
bit0- LOS
bit1- LOF
bit2- RRA
bit3- LMF
bit4- AISro INTEGER .1.3.6.1.4.1.2011.2.6.5.8.2.1.9 |
hwMusaCescPortUtopiaStatusUTOPIA port state( normal(1), test(2), idle(3), noinstall(4), failure(5), blocked(6)ro Enumeration .1.3.6.1.4.1.2011.2.6.5.8.2.1.10 |
hwMusaCescPortLiuStatusLIU port state (normal(1), test(2), idle(3), noinstall(4),failure(5),blocked(6),localtest(11),remotetest(12),tslocal(13)ro Enumeration .1.3.6.1.4.1.2011.2.6.5.8.2.1.11 |
hwMusaCescPortBlockTo block or unblock the E1 portrw Enumeration .1.3.6.1.4.1.2011.2.6.5.8.2.1.12 |
hwMusaCescPortV35CfgTableV35 port config table SEQUENCE OF HwMusaCescPortV35CfgEntry .1.3.6.1.4.1.2011.2.6.5.8.3 |
hwMusaCescPortV35CfgEntryV35 port config table entry HwMusaCescPortV35CfgEntry .1.3.6.1.4.1.2011.2.6.5.8.3.1 |
hwMusaCescPortV35NValueN value of V35 portro INTEGER .1.3.6.1.4.1.2011.2.6.5.8.3.1.4 |
hwMusaCescPortV35ClockModeClock mode of V35 portrw Enumeration .1.3.6.1.4.1.2011.2.6.5.8.3.1.5 |
hwMusaCescPortV35BlockStatusTo block or unblock the V35 portrw Enumeration .1.3.6.1.4.1.2011.2.6.5.8.3.1.6 |
hwMusaCescPortV35ReversePhaseInverse the clock of V35 portrw Enumeration .1.3.6.1.4.1.2011.2.6.5.8.3.1.7 |
hwMusaCescPortV35WarningStatusAlarm state of V35 portro INTEGER .1.3.6.1.4.1.2011.2.6.5.8.3.1.8 |
hwMusaCescPortV35StatusPort state of V35ro Enumeration .1.3.6.1.4.1.2011.2.6.5.8.3.1.9 |
hwMusaCescChnlStatisTableStatistics table of CES SDT channel SEQUENCE OF HwMusaCescChnlStatisEntry .1.3.6.1.4.1.2011.2.6.5.8.4 |
hwMusaCescChnlStatisEntryStatistics table entry of CES SDT channel HwMusaCescChnlStatisEntry .1.3.6.1.4.1.2011.2.6.5.8.4.1 |
hwMusaCescChnlIndexSDT channel Index INTEGER .1.3.6.1.4.1.2011.2.6.5.8.4.1.4 |
hwMusaCescChnlStatisCounter0Discard cells due to output queuerw Counter .1.3.6.1.4.1.2011.2.6.5.8.4.1.5 |
hwMusaCescChnlStatisCounter1not usedrw Counter .1.3.6.1.4.1.2011.2.6.5.8.4.1.6 |
hwMusaCescChnlStatisCounter2Cells that are passed to framer interfacerw Counter .1.3.6.1.4.1.2011.2.6.5.8.4.1.7 |
hwMusaCescChnlStatisCounter3Times SDT start of structure changes phase upstreamrw Counter .1.3.6.1.4.1.2011.2.6.5.8.4.1.8 |
hwMusaCescChnlStatisCounter4Discard downstream cells with invalid SN/SNPrw Counter .1.3.6.1.4.1.2011.2.6.5.8.4.1.9 |
hwMusaCescChnlStatisCounter5End of reassembly buffer overflowrw Counter .1.3.6.1.4.1.2011.2.6.5.8.4.1.10 |
hwMusaCescChnlStatisCounter6Downstream cells with invalid SN/SNPrw Counter .1.3.6.1.4.1.2011.2.6.5.8.4.1.11 |
hwMusaCescChnlStatisCounter7SC out of sequencerw Counter .1.3.6.1.4.1.2011.2.6.5.8.4.1.12 |
hwMusaCescChnlStatisCounter8Downstream misinserted cells detected by SC algorithmrw Counter .1.3.6.1.4.1.2011.2.6.5.8.4.1.13 |
hwMusaCescChnlStatisCounter9Downstream cells discarded by SC algorithmrw Counter .1.3.6.1.4.1.2011.2.6.5.8.4.1.14 |
hwMusaCescChnlStatisCounter10Rejected SDT pointer due to parity errorrw Counter .1.3.6.1.4.1.2011.2.6.5.8.4.1.15 |
hwMusaCescChnlStatisCounter11SC cycles with no SDT pointer field or more than one pointer fieldrw Counter .1.3.6.1.4.1.2011.2.6.5.8.4.1.16 |
hwMusaCescChnlStatisCounter12End of reassembly buffer underflowrw Counter .1.3.6.1.4.1.2011.2.6.5.8.4.1.17 |
hwMusaCescChnlStatisCounter13Insert starvation cells due to reassembly buffer underflowrw Counter .1.3.6.1.4.1.2011.2.6.5.8.4.1.18 |
hwMusaCescChnlStatisCounter14Times ATM start of structure out of sync with port start of structurerw Counter .1.3.6.1.4.1.2011.2.6.5.8.4.1.19 |
hwMusaCescChnlStatisCounter15Downstream lost cells detected by SC algorithmrw Counter .1.3.6.1.4.1.2011.2.6.5.8.4.1.20 |
hwMusaCescChnlStatisOperClear CES SDT channel statisticsrw Enumeration .1.3.6.1.4.1.2011.2.6.5.8.4.1.21 |
hwMusaCescPortStatisTableStatistics table of CES UDT/UNI port(UNI port only use from counter 0 to counter 4) SEQUENCE OF HwMusaCescPortStatisEntry .1.3.6.1.4.1.2011.2.6.5.8.5 |
hwMusaCescPortStatisEntryStatistics table entry of CES UDT/UNI port HwMusaCescPortStatisEntry .1.3.6.1.4.1.2011.2.6.5.8.5.1 |
hwMusaCescPortStatisCounter0Discard cells due to output queuerw Counter .1.3.6.1.4.1.2011.2.6.5.8.5.1.4 |
hwMusaCescPortStatisCounter1Not used (UDT)
Received cells with correctable HEC errors (UNI)rw Counter .1.3.6.1.4.1.2011.2.6.5.8.5.1.5 |
hwMusaCescPortStatisCounter2Cells that are passed to framer interface (UDT)
Received cells with non-correctable HEC errors (UNI)rw Counter .1.3.6.1.4.1.2011.2.6.5.8.5.1.6 |
hwMusaCescPortStatisCounter3Times SDT start of structure changes phase upstream (UDT)
Times cell delineation SYNC state is left (UNI)rw Counter .1.3.6.1.4.1.2011.2.6.5.8.5.1.7 |
hwMusaCescPortStatisCounter4Discard downstream cells with invalid SN/SNP (UDT)
Discard cells due to ATM transmit buffer overflow (UNI)rw Counter .1.3.6.1.4.1.2011.2.6.5.8.5.1.8 |
hwMusaCescPortStatisCounter5End of reassembly buffer overflow (UDT)rw Counter .1.3.6.1.4.1.2011.2.6.5.8.5.1.9 |
hwMusaCescPortStatisCounter6Downstream cells with invalid SN/SNP (UDT)rw Counter .1.3.6.1.4.1.2011.2.6.5.8.5.1.10 |
hwMusaCescPortStatisCounter7SC out of sequence (UDT)rw Counter .1.3.6.1.4.1.2011.2.6.5.8.5.1.11 |
hwMusaCescPortStatisCounter8Downstream misinserted cells detected by SC algorithm (UDT)rw Counter .1.3.6.1.4.1.2011.2.6.5.8.5.1.12 |
hwMusaCescPortStatisCounter9Downstream cells discarded by SC algorithm (UDT)rw Counter .1.3.6.1.4.1.2011.2.6.5.8.5.1.13 |
hwMusaCescPortStatisCounter10Rejected SDT pointer due to parity error (UDT)rw Counter .1.3.6.1.4.1.2011.2.6.5.8.5.1.14 |
hwMusaCescPortStatisCounter11SC cycles with no SDT pointer field or more than one pointer field (UDT)rw Counter .1.3.6.1.4.1.2011.2.6.5.8.5.1.15 |
hwMusaCescPortStatisCounter12End of reassembly buffer underflow (UDT)rw Counter .1.3.6.1.4.1.2011.2.6.5.8.5.1.16 |
hwMusaCescPortStatisCounter13Insert starvation cells due to reassembly buffer underflow (UDT)rw Counter .1.3.6.1.4.1.2011.2.6.5.8.5.1.17 |
hwMusaCescPortStatisCounter14Times ATM start of structure out of sync with port start of structure (UDT)rw Counter .1.3.6.1.4.1.2011.2.6.5.8.5.1.18 |
hwMusaCescPortStatisCounter15Downstream lost cells detected by SC algorithm (UDT)rw Counter .1.3.6.1.4.1.2011.2.6.5.8.5.1.19 |
hwMusaCescPortStatisOperClear CES UNI/UDT port statisticsrw Enumeration .1.3.6.1.4.1.2011.2.6.5.8.5.1.20 |
hwMusaCescPortMaintTableMaintenace table of CES port SEQUENCE OF HwMusaCescPortMaintEntry .1.3.6.1.4.1.2011.2.6.5.8.6 |
hwMusaCescPortMaintEntryMaintenace table entry of CES port HwMusaCescPortMaintEntry .1.3.6.1.4.1.2011.2.6.5.8.6.1 |
hwMusaCescPortMaintLoopThe looping test mode of CES portrw Enumeration .1.3.6.1.4.1.2011.2.6.5.8.6.1.4 |
hwMusaCescPortMaintOperThe oprating of looping test moderw Enumeration .1.3.6.1.4.1.2011.2.6.5.8.6.1.5 |
hwMusaCescSingleTimeslotIdThe timeslot number of single timeslot looping test (only for SDT port)rw INTEGER .1.3.6.1.4.1.2011.2.6.5.8.6.1.6 |
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